This section describes each of the characteristics contained in the processor summary
tables included for each processor. The table below is identical to those used for each
CPU, except that an explanation is given for what each statistic means.
General
Information |
Manufacturer |
The company or companies that manufacture the processor. |
Family Name |
The name of the processor family. |
Code name |
The code name that was/is used to refer to this processor. |
Processor Generation |
Processor generation, first to sixth. |
Motherboard
Generation |
The generation of the motherboard that this processor runs
on; this is normally the same as the processor generation but not always. |
Version |
The particular name of each version of the processor
family. |
Introduced |
The date that the processor was introduced. Note that this
is the release date of the processor, which doesn't always equal the date that systems
with the processor in them were first available. |
Variants and
Licensed Equivalents |
Some processors were manufactured by other companies under
license from the original designer; these are listed here. |
Speed
Specifications |
Memory Bus Speed
(MHz) |
The speed of the main system
memory bus in MHz. |
Processor Clock
Multiplier |
The multiplier value for
the processor; the amount that is multiplied by the memory bus speed to get the
processor speed. |
Processor Speed
(MHz) |
The speed of the processor in MHz. |
"P" Rating |
For some processors, the "P
rating", which is the manufacturer's claim of the performance level of the
processor regardless of its internal clock speed. |
Benchmarks |
iCOMP Rating |
The processor's iCOMP
benchmark. For Intel processors from the 80386 through the Pentium. |
ICOMP 2.0 Rating |
The iCOMP 2.0
benchmark for the processor, for Intel processors from the Pentium on. |
Norton SI |
The original Norton
SI benchmark rating, also sometimes called Norton SI 8.0. |
Norton SI32 |
The new Norton SI
32-bit benchmark rating for the processor. |
CPUmark32 |
The processor's Ziff-Davis
WinBench 32-bit CPU benchmark. |
Physical
Characteristics |
Process Technology |
The process technology
used in manufacturing the chip; usually CMOS or Bipolar CMOS. |
Circuit Size
(microns) |
The circuit size in
microns, reflecting the miniaturization level of the processor. |
Die Size (mm^2) |
The physical size of the
actual silicon chip (not the package that it is placed in). |
Transistors
(millions) |
The number of transistors used in making the chip; more
complex processors use more transistors. |
Voltage,
Power and Cooling |
External or I/O
Voltage (V) |
The external voltage
level used by the processor to interface to the motherboard, also called I/O voltage. |
Internal or Core
Voltage (V) |
The internal voltage
used by the core of the processor; lower than the external voltage on newer processors. |
Power Management |
Power management protocol
used by the processor, if any. |
Cooling Requirements |
The generally-accepted cooling
method required for the processor. Note that this is not really "cast in stone";
some manufacturers use a larger passive heat sink instead of an active one with no
problems. |
Packaging |
Packaging Style |
The packaging used for the
processor, including the number of pins. |
Motherboard
Interface |
The socket or slot style
used to connect the processor to the motherboard. |
External
Architecture |
Data Bus Width
(bits) |
The width of the data
bus in bits. |
Maximum Data Bus
Bandwidth (Mbytes/sec) |
The maximum theoretical bandwidth of the data bus, computed
as (memory bus speed * data bus width) / 8 / 1.048576. Note that this assumes the ability
to perform one transfer per clock cycle, and many older CPUs were not able to do this. The
"1.048576" factor converts the term to true megabytes (2^20). |
Address Bus Width
(bits) |
The address bus width
in bits. |
Maximum Addressable
Memory |
The maximum theoretical amount of memory that the processor
can address (generally 2^n where n is the width of the address bus). |
Level 2 Cache Type |
The type of
secondary cache used, motherboard, integrated or processor card. |
Level 2 Cache Size |
The secondary
cache size. For processors that have the secondary cache on the motherboard a typical
range is provided since the actual value in any system of course depends on the particular
motherboard. |
Level 2 Cache Bus
Speed |
The speed of the secondary cache. This is usually either
the same as the memory bus speed or the processor speed. |
Multiprocessing |
Whether or not the processor can be used in a multiprocessing environment, and if so, how many can be
used. |
Internal
Architecture |
Instruction Set |
The instruction set
supported by the processor, including any extensions (other than MMX). |
MMX Support |
Whether or not the processor supports the MMX instruction set extension. |
Processor Modes |
The different processor
modes supported. |
x86 Execution Method |
The execution method that the processor uses, either native
or emulation. |
Internal
Components |
Register Size (bits) |
The width of the processor's internal registers, which indicates the
processor's overall "size". |
Pipeline Depth
(stages) |
The number of steps in the processor's internal pipelines. |
Level 1 Cache Size |
The size of the level
1 data and instruction caches. |
Level 1 Cache
Mapping |
The associativity of the level 1 cache. |
Level 1 Cache Write
Policy |
The write policy
of the primary cache, either write-through or write-back (or both). |
Integer Units |
The number of integer
execution units in the processor. This includes specialized branch and load/store
units, as well as dedicated MMX units. |
Floating Point Unit
/ Math Coprocessor |
For processors that have a built-in FPU, says "Integrated". For those that use a
separate coprocessor, indicates its name. |
Instruction Decoders |
The number and type of decoders used in the processor. |
Branch Prediction
Buffer Size / Accuracy |
The number of entries in the branch target buffer and the
claimed accuracy level of the branch prediction unit, for processors that use branch prediction. |
Write Buffers |
The number of write
buffers used to hold execution results. |
Performance
Enhancing Features |
Indicates any additional performance-enhancing
features, such as out of order execution, speculative execution, register renaming, or
superpipelining. |